我目前CAN总线不能实现扩展帧的收与发，不知道怎么配置？
还有中断服务程序进不了，不知道什么问题
哪位大哥帮忙看下我的程序有什么问题，配置程序如下：
void InitECana(void) // Initialize eCAN-A module
{
/* Create a shadow register structure for the CAN control registers. This is
needed, since only 32-bit access is allowed to these registers. 16-bit access
to these registers could potentially corrupt the register contents or return
false data. */
uint32 i;
volatile struct MBOX *Mailbox;
struct ECAN_REGS ECanaShadow;
EALLOW; // EALLOW enables access to protected bits
/* Configure eCAN RX and TX pins for CAN operation using eCAN regs*/
//配置完GPIO后，设置CANTX CANRX做为CAN通信引脚，
//用到的寄存器是功能控制寄存器TXIO RXIO中的TXFUNC RXFUNC
//TXFUNC=1作为can的发送引脚 =0保留
//RXFUNC=1作为CAN的接收引脚 =0保留
ECanaShadow.CANTIOC.all = ECanaRegs.CANTIOC.all;
ECanaShadow.CANTIOC.bit.TXFUNC = 1;
ECanaRegs.CANTIOC.all = ECanaShadow.CANTIOC.all;
ECanaShadow.CANRIOC.all = ECanaRegs.CANRIOC.all;
ECanaShadow.CANRIOC.bit.RXFUNC = 1;
ECanaRegs.CANRIOC.all = ECanaShadow.CANRIOC.all;
/* Configure eCAN for HECC mode - (reqd to access mailboxes 16 thru 31) */
// HECC mode also enables time-stamping feature
//选择是增强型还是标准型 SCB=1增强型 =0标准型
ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
ECanaShadow.CANMC.bit.SCB = 1;
ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;
/* Initialize all bits of 'Message Control Register' to zero */
// Some bits of MSGCTRL register come up in an unknown state. For proper operation,
// all bits (including reserved bits) of MSGCTRL must be initialized to zero
//邮箱控制寄存器清零
ECanaRegs.CANME.all = 0x00000000;//|= (((uint32)1<< mboxn));//写ID之前屏蔽邮箱
Mailbox=&ECanaMboxes.MBOX0;
for(i=0;i<32;i++)
{
(Mailbox+i)->MSGCTRL.all =0x00000000;
(Mailbox+i)->MSGID.all =0x00000000;
(Mailbox+i)->MDL.all =0x00000000;
(Mailbox+i)->MDH.all =0x00000000;
}
(Mailbox+30)->MSGID.all =0x11223344;
(Mailbox+30)->MSGCTRL.all =0x00000007;
ECanaRegs.CANME.all = 0xffffffff;//|= (((uint32)1<< mboxn));//写ID之后启用邮箱
// TAn, RMPn, GIFn bits are all zero upon reset and are cleared again
// as a matter of precaution.
ECanaRegs.CANTA.all = 0xFFFFFFFF; /* Clear all TAn bits */
ECanaRegs.CANRMP.all = 0xFFFFFFFF; /* Clear all RMPn bits */
ECanaRegs.CANGIF0.all = 0xFFFFFFFF; /* Clear all interrupt flag bits */
ECanaRegs.CANGIF1.all = 0xFFFFFFFF;
/* Configure bit timing parameters for eCANA*/
//复位后CCR和CCE位置1，允许用户配置位时间配置寄存器，这个就是初始化要等待CCR和CCE位的状态
ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
ECanaShadow.CANMC.bit.CCR = 1 ; // Set CCR = 1
ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;
// Wait until the CPU has been granted permission to change the configuration registers
do
{
ECanaShadow.CANES.all = ECanaRegs.CANES.all;
} while(ECanaShadow.CANES.bit.CCE != 1 ); // Wait for CCE bit to be set..
ECanaShadow.CANBTC.all = 0;
/* The following block is only for 60 MHz SYSCLKOUT. (30 MHz CAN module clock Bit rate = 1 Mbps
See Note at end of file. */
//配置CANBTC，确认TSEG1和TSEG2不等于0，如果这两个同时为0，则CAN模块不能退出初始化模式
//TSEG1>TSEG2 TSEG1>6 TSEG<8
//CAN module clock=SYSCLK/(BRP*Bit Time)
//BRP=BRPreg+1 BT=TSEG1+1+TSEG2+1+1
//设定通信速率------------------------------------------------------------------此配置1M
ECanaShadow.CANBTC.bit.BRPREG = 2;
ECanaShadow.CANBTC.bit.TSEG2REG = 1;
ECanaShadow.CANBTC.bit.TSEG1REG = 6;
ECanaShadow.CANBTC.bit.SAM = 1;
ECanaRegs.CANBTC.all = ECanaShadow.CANBTC.all;
ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
ECanaShadow.CANMC.bit.CCR = 0 ; // Set CCR = 0
ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;
// Wait until the CPU no longer has permission to change the configuration registers
do
{
ECanaShadow.CANES.all = ECanaRegs.CANES.all;
} while(ECanaShadow.CANES.bit.CCE != 0 ); // Wait for CCE bit to be cleared..
//禁止所有邮箱
//开放中断--------------------------------------------------------------------------------
// |
PieVectTable.ECAN0INTA = &CanRcvIsr;//中断服务程序地址写入PIE中断向量表，选择中断线 |
//中断设置
// |
ECanaRegs.CANMIL.all = 0x00000000; //邮箱中断连接到中断线0 |
ECanaRegs.CANMIM.all = 0xffffffff; //1-31邮箱均产生中断 |
ECanaRegs.CANGIM.all = 0x00004001; //开放中断线0，所有中断连接到中断线0，屏蔽超时等中断
PieCtrlRegs.PIECTRL.bit.ENPIE = 1; // 使能PIE块 |
PieCtrlRegs.PIEIER9.bit.INTx6=1; // 使能Ecan中断 |
IER |=0x0100; //开放第九组中断 |
EINT; //开放全局中断
ERTM; //|
// |
//----------------------------------------------------------------------------------------
//开放自测试模式-------------------------------------------------------------------------
/*
ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
ECanaShadow.CANMC.bit.STM = 1; // Configure CAN for self-test mode
ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;*/
EDIS;
//--------------------------------------------------------------------------------------
}