下面是epwm的设置,我画了一个图,麻烦看看是不是这样,我自己感觉不是很正确
//Time Base SubModule Register
(*ePWM[n+1]).TBCTL.bit.PRDLD = TB_SHADOW; //Load from its Shadow Register
(*ePWM[n+1]).TBPRD = period-1;
(*ePWM[n+1]).TBPHS.half.TBPHS = 0;
(*ePWM[n+1]).TBCTR = 0;
(*ePWM[n+1]).TBCTL.bit.CTRMODE = TB_COUNT_UP;
(*ePWM[n+1]).TBCTL.bit.PHSEN = TB_ENABLE;
(*ePWM[n+1]).TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // Sync "flow through" mode
(*ePWM[n+1]).TBCTL.bit.HSPCLKDIV = TB_DIV1;
(*ePWM[n+1]).TBCTL.bit.CLKDIV = TB_DIV1;
// Counter compare submodule registers
(*ePWM[n+1]).CMPA.half.CMPA = period + 10; // Initial value
(*ePWM[n+1]).CMPB = 20; // Initial value
(*ePWM[n+1]).CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // Load on CTR = Zero:TBCTR = Ox0000
(*ePWM[n+1]).CMPCTL.bit.SHDWAMODE = CC_SHADOW; // Shadow mode
(*ePWM[n+1]).CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
(*ePWM[n+1]).CMPCTL.bit.SHDWBMODE = CC_SHADOW;
// Action Qualifier SubModule Registers
(*ePWM[n+1]).AQCTLA.bit.CAU = AQ_SET;
(*ePWM[n+1]).AQCTLA.bit.CBU = AQ_CLEAR;
(*ePWM[n+1]).AQCTLA.bit.ZRO = AQ_CLEAR;
(*ePWM[n+1]).AQCTLA.bit.PRD = AQ_CLEAR;
(*ePWM[n+1]).AQCTLB.bit.CBU = AQ_SET;
(*ePWM[n+1]).AQCTLB.bit.CAU = AQ_CLEAR;
(*ePWM[n+1]).AQCTLB.bit.ZRO = AQ_CLEAR;
(*ePWM[n+1]).AQCTLB.bit.PRD = AQ_CLEAR;